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Silicon Labs /EFR32ZG23B010F512IM48 /EUSART2_S /CLKDIV

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Interpret as CLKDIV

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https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/EUART0_S/CLKDIV#0x0

31282724232019161512118743000000000000000000000000000000000000000000DIV

Description

No Description

Fields

DIV

Fractional Clock Divider

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data